/* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. ChibiOS/RT is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. ChibiOS/RT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . --- A special exception to the GPL can be applied should you wish to distribute a combined work that includes ChibiOS/RT, without being obliged to provide the source code for any proprietary components. See the file exception.txt for full details of how and when the exception can be applied. */ /** * @defgroup STM8S STM8S Drivers * @details This section describes all the supported drivers on the STM8S * platform and the implementation details of the single drivers. * * @ingroup platforms */ /** * @defgroup STM8S_HAL STM8S Initialization Support * @details The STM8S HAL support is responsible for system initialization. * * @section stm8s_hal_1 Supported HW resources * - CLK. * . * @section stm8s_hal_2 STM8S HAL driver implementation features * - Clock tree initialization. * - Clock source selection. * . * @ingroup STM8S */ /** * @defgroup STM8S_PAL STM8S PAL Support * @details The STM8S PAL driver uses the GPIO peripherals. * * @section stm8s_pal_1 Supported HW resources * - GPIOA. * - GPIOB. * - GPIOC. * - GPIOD. * - GPIOE. * - GPIOF. * - GPIOG (where present). * - GPIOH (where present). * - GPIOI (where present). * . * @section stm8s_pal_2 STM8S PAL driver implementation features * The PAL driver implementation fully supports the following hardware * capabilities: * - 8 bits wide ports. * - Atomic set/reset/toggle functions because special STM8S instruction set. * - Output latched regardless of the pad setting. * - Direct read of input pads regardless of the pad setting. * . * @section stm8s_pal_3 Supported PAL setup modes * The STM8S PAL driver supports the following I/O modes: * - @p PAL_MODE_RESET. * - @p PAL_MODE_UNCONNECTED. * - @p PAL_MODE_INPUT. * - @p PAL_MODE_INPUT_PULLUP. * - @p PAL_MODE_OUTPUT_PUSHPULL. * - @p PAL_MODE_OUTPUT_OPENDRAIN. * . * Any attempt to setup an invalid mode is ignored. * * @section stm8s_pal_4 Suboptimal behavior * The STM8S GPIO is less than optimal in several areas, the limitations * should be taken in account while using the PAL driver: * - Bus/group writing is not atomic. * - Pad/group mode setup is not atomic. * . * @ingroup STM8S */ /** * @defgroup STM8S_SERIAL STM8S Serial Support * @details The STM8S Serial driver uses the UART peripherals in a * buffered, interrupt driven, implementation. * * @section stm8s_serial_1 Supported HW resources * The serial driver can support any of the following hardware resources: * - UART1. * - UART2 (where present). * - UART3 (where present). * . * @section stm8s_serial_2 STM8S Serial driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Each UART can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Fully interrupt driven. * . * @ingroup STM8S */ /** * @defgroup STM8S_SPI STM8S SPI Support * @details The SPI driver supports the STM8S SPI peripheral in an interrupt * driven implementation. * @note Being the SPI a fast peripheral, much care must be taken to * not saturate the CPU bandwidth with an excessive IRQ rate. The * maximum transfer bit rate is likely limited by the IRQ * handling. * * @section stm8s_spi_1 Supported HW resources * - SPI. * . * @section stm8s_spi_2 STM8S SPI driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Fully interrupt driven. * . * @ingroup STM8S */