|
|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
|
/**
* \defgroup libwismart WiSmart MCU specific library
*
* The libwismart library provides definitions for the MCU.
*
* @{
*/
/**
* \file
* WiSmart library header file.
* \author
* eConais RnD Group
*/
/*
* This software is copyrighted by and is the sole property of eConais.
* All rights, title, ownership, or other interests in the software remain
* the property of eConais. This software may only be used in accordance
* with the corresponding license agreement. Any unauthorized use,
* duplication, transmission, distribution, or disclosure of this software
* is expressly forbidden.
*
* This copyright notice may not be removed or modified without prior written
* consent of eConais.
*
* eConais reserves the right to modify this software without
* notice.
*
* eConais
* Patras Science Park support@econais.com
* 26504 Platani, Patras http://www.econais.com
* GREECE
*
* This file is part of WiSmart SDK
*
* Author: eConais RnD Group
*
*/
#ifndef LIBWISMART_MCU_H_
#define LIBWISMART_MCU_H_
/*===========================================================================*/
/* STM32F4 */
/*===========================================================================*/
#ifdef STM32F4
/*===========================================================================*/
/* Platform specific friendly IRQ names. */
/*===========================================================================*/
#define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
#define PVD_IRQHandler Vector44 /**< PVD through EXTI Line detect.*/
#define TAMP_STAMP_IRQHandler Vector48 /**< Tamper and TimeStamp through EXTI Line.*/
#define RTC_WKUP_IRQHandler Vector4C /**< RTC wakeup EXTI Line. */
#define FLASH_IRQHandler Vector50 /**< Flash. */
#define RCC_IRQHandler Vector54 /**< RCC. */
#define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
#define EXTI1_IRQHandler Vector5C /**< EXTI Line 1. */
#define EXTI2_IRQHandler Vector60 /**< EXTI Line 2. */
#define EXTI3_IRQHandler Vector64 /**< EXTI Line 3. */
#define EXTI4_IRQHandler Vector68 /**< EXTI Line 4. */
#define DMA1_Stream0_IRQHandler Vector6C /**< DMA1 Stream 0. */
#define DMA1_Stream1_IRQHandler Vector70 /**< DMA1 Stream 1. */
#define DMA1_Stream2_IRQHandler Vector74 /**< DMA1 Stream 2. */
#define DMA1_Stream3_IRQHandler Vector78 /**< DMA1 Stream 3. */
#define DMA1_Stream4_IRQHandler Vector7C /**< DMA1 Stream 4. */
#define DMA1_Stream5_IRQHandler Vector80 /**< DMA1 Stream 5. */
#define DMA1_Stream6_IRQHandler Vector84 /**< DMA1 Stream 6. */
#define ADC1_2_3_IRQHandler Vector88 /**< ADC1, ADC2 and ADC3. */
#define CAN1_TX_IRQHandler Vector8C /**< CAN1 TX. */
#define CAN1_RX0_IRQHandler Vector90 /**< CAN1 RX0. */
#define CAN1_RX1_IRQHandler Vector94 /**< CAN1 RX1. */
#define CAN1_SCE_IRQHandler Vector98 /**< CAN1 SCE. */
#define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
#define TIM1_BRK_IRQHandler VectorA0 /**< TIM1 Break. */
#define TIM1_UP_IRQHandler VectorA4 /**< TIM1 Update. */
#define TIM1_TRG_COM_IRQHandler VectorA8 /**< TIM1 Trigger and Commutation.*/
#define TIM1_CC_IRQHandler VectorAC /**< TIM1 Capture Compare. */
#define TIM2_IRQHandler VectorB0 /**< TIM2. */
#define TIM3_IRQHandler VectorB4 /**< TIM3. */
#define TIM4_IRQHandler VectorB8 /**< TIM4. */
#define I2C1_EV_IRQHandler VectorBC /**< I2C1 Event. */
#define I2C1_ER_IRQHandler VectorC0 /**< I2C1 Error. */
#define I2C2_EV_IRQHandler VectorC4 /**< I2C2 Event. */
#define I2C2_ER_IRQHandler VectorC8 /**< I2C1 Error. */
#define SPI1_IRQHandler VectorCC /**< SPI1. */
#define SPI2_IRQHandler VectorD0 /**< SPI2. */
#define USART1_IRQHandler VectorD4 /**< USART1. */
#define USART2_IRQHandler VectorD8 /**< USART2. */
#define USART3_IRQHandler VectorDC /**< USART3. */
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTC_Alarm_IRQHandler VectorE4 /**< RTC alarms (A and B) through EXTI line.*/
#define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through EXTI line.*/
#define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */
#define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */
#define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and Commutation.*/
#define TIM8_CC_IRQHandler VectorF8 /**< TIM8 Capture Compare. */
#define DMA1_Stream7_IRQHandler VectorFC /**< DMA1 Stream 7. */
#define FSMC_IRQHandler Vector100 /**< FSMC. */
#define SDIO_IRQHandler Vector104 /**< SDIO. */
#define TIM5_IRQHandler Vector108 /**< TIM5. */
#define SPI3_IRQHandler Vector10C /**< SPI3. */
#define UART4_IRQHandler Vector110 /**< UART4. */
#define UART5_IRQHandler Vector114 /**< UART5. */
#define TIM6_IRQHandler Vector118 /**< TIM6. */
#define TIM7_IRQHandler Vector11C /**< TIM7. */
#define DMA2_Stream0_IRQHandler Vector120 /**< DMA2 Stream0. */
#define DMA2_Stream1_IRQHandler Vector124 /**< DMA2 Stream1. */
#define DMA2_Stream2_IRQHandler Vector128 /**< DMA2 Stream2. */
#define DMA2_Stream3_IRQHandler Vector12C /**< DMA2 Stream3. */
#define DMA2_Stream4_IRQHandler Vector130 /**< DMA2 Stream4. */
#define ETH_IRQHandler Vector134 /**< Ethernet. */
#define ETH_WKUP_IRQHandler Vector138 /**< Ethernet Wakeup through EXTI line. */
#define CAN2_TX_IRQHandler Vector13C /**< CAN2 TX. */
#define CAN2_RX0_IRQHandler Vector140 /**< CAN2 RX0. */
#define CAN2_RX1_IRQHandler Vector144 /**< CAN2 RX1. */
#define CAN2_SCE_IRQHandler Vector148 /**< CAN2 SCE. */
#define OTG_FS_IRQHandler Vector14C /**< USB OTG FS. */
#define DMA2_Stream5_IRQHandler Vector150 /**< DMA2 Stream5. */
#define DMA2_Stream6_IRQHandler Vector154 /**< DMA2 Stream6. */
#define DMA2_Stream7_IRQHandler Vector158 /**< DMA2 Stream7. */
#define USART6_IRQHandler Vector15C /**< USART6. */
#define I2C3_EV_IRQHandler Vector160 /**< I2C3 Event. */
#define I2C3_ER_IRQHandler Vector164 /**< I2C3 Error. */
#define OTG_HS_EP1_OUT_IRQHandler Vector168 /**< USB OTG HS End Point 1 Out.*/
#define OTG_HS_EP1_IN_IRQHandler Vector16C /**< USB OTG HS End Point 1 In. */
#define OTG_HS_WKUP_IRQHandler Vector170 /**< USB OTG HS Wakeup through EXTI line.*/
#define OTG_HS_IRQHandler Vector174 /**< USB OTG HS. */
#define DCMI_IRQHandler Vector178 /**< DCMI. */
#define CRYP_IRQHandler Vector17C /**< CRYP. */
#define HASH_RNG_IRQHandler Vector180 /**< Hash and Rng. */
#endif /* STM32F4 */
/*===========================================================================*/
/* STM32F1 */
/*===========================================================================*/
#ifdef STM32F1
/*===========================================================================*/
/* Platform specific friendly IRQ names. */
/*===========================================================================*/
#define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
#define PVD_IRQHandler Vector44 /**< PVD through EXTI Line detect.*/
#define TAMPER_IRQHandler Vector48 /**< Tamper. */
#define RTC_IRQHandler Vector4C /**< RTC. */
#define FLASH_IRQHandler Vector50 /**< Flash. */
#define RCC_IRQHandler Vector54 /**< RCC. */
#define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
#define EXTI1_IRQHandler Vector5C /**< EXTI Line 1. */
#define EXTI2_IRQHandler Vector60 /**< EXTI Line 2. */
#define EXTI3_IRQHandler Vector64 /**< EXTI Line 3. */
#define EXTI4_IRQHandler Vector68 /**< EXTI Line 4. */
#define DMA1_Ch1_IRQHandler Vector6C /**< DMA1 Channel 1. */
#define DMA1_Ch2_IRQHandler Vector70 /**< DMA1 Channel 2. */
#define DMA1_Ch3_IRQHandler Vector74 /**< DMA1 Channel 3. */
#define DMA1_Ch4_IRQHandler Vector78 /**< DMA1 Channel 4. */
#define DMA1_Ch5_IRQHandler Vector7C /**< DMA1 Channel 5. */
#define DMA1_Ch6_IRQHandler Vector80 /**< DMA1 Channel 6. */
#define DMA1_Ch7_IRQHandler Vector84 /**< DMA1 Channel 7. */
#define ADC1_2_IRQHandler Vector88 /**< ADC1_2. */
#define CAN1_TX_IRQHandler Vector8C /**< CAN1 TX. */
#define USB_HP_IRQHandler Vector8C /**< USB High Priority, CAN1 TX.*/
#define CAN1_RX0_IRQHandler Vector90 /**< CAN1 RX0. */
#define USB_LP_IRQHandler Vector90 /**< USB Low Priority, CAN1 RX0.*/
#define CAN1_RX1_IRQHandler Vector94 /**< CAN1 RX1. */
#define CAN1_SCE_IRQHandler Vector98 /**< CAN1 SCE. */
#define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
#define TIM1_BRK_IRQHandler VectorA0 /**< TIM1 Break. */
#define TIM1_UP_IRQHandler VectorA4 /**< TIM1 Update. */
#define TIM1_TRG_COM_IRQHandler VectorA8 /**< TIM1 Trigger and Commutation.*/
#define TIM1_CC_IRQHandler VectorAC /**< TIM1 Capture Compare. */
#define TIM2_IRQHandler VectorB0 /**< TIM2. */
#define TIM3_IRQHandler VectorB4 /**< TIM3. */
#define TIM4_IRQHandler VectorB8 /**< TIM4. */
#define I2C1_EV_IRQHandler VectorBC /**< I2C1 Event. */
#define I2C1_ER_IRQHandler VectorC0 /**< I2C1 Error. */
#define I2C2_EV_IRQHandler VectorC4 /**< I2C2 Event. */
#define I2C2_ER_IRQHandler VectorC8 /**< I2C2 Error. */
#define SPI1_IRQHandler VectorCC /**< SPI1. */
#define SPI2_IRQHandler VectorD0 /**< SPI2. */
#define USART1_IRQHandler VectorD4 /**< USART1. */
#define USART2_IRQHandler VectorD8 /**< USART2. */
#define USART3_IRQHandler VectorDC /**< USART3. */
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
#define USB_FS_WKUP_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
#define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */
#define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */
#define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and Commutation.*/
#define TIM8_CC_IRQHandler VectorF8 /**< TIM8 Capture Compare. */
#define ADC3_IRQHandler VectorFC /**< ADC3. */
#define FSMC_IRQHandler Vector100 /**< FSMC. */
#define SDIO_IRQHandler Vector104 /**< SDIO. */
#define TIM5_IRQHandler Vector108 /**< TIM5. */
#define SPI3_IRQHandler Vector10C /**< SPI3. */
#define UART4_IRQHandler Vector110 /**< UART4. */
#define UART5_IRQHandler Vector114 /**< UART5. */
#define TIM6_IRQHandler Vector118 /**< TIM6. */
#define TIM7_IRQHandler Vector11C /**< TIM7. */
#define DMA2_Ch1_IRQHandler Vector120 /**< DMA2 Channel1. */
#define DMA2_Ch2_IRQHandler Vector124 /**< DMA2 Channel2. */
#define DMA2_Ch3_IRQHandler Vector128 /**< DMA2 Channel3. */
#define DMA2_Ch4_5_IRQHandler Vector12C /**< DMA2 Channel4 & Channel5. */
#endif /* STM32F1 */
#endif /* LIBWISMART_MCU_H_ */
|
